A charge-trapping material such as a floating gate or a charge-trapping material can be used in non-volatile memory devices to store a charge that represents a data state. A charge-trapping material can be arranged vertically in a three-dimensional (3D) stacked memory structure, or horizontally in a two-dimensional (2D) memory structure. One example of a 3D memory structure is the Bit Cost Scalable (BiCS) architecture which comprises a stack of alternating conductive and dielectric layers.
A non-volatile memory device includes memory cells which may be arranged in strings, for instance, where select gate transistors are provided at the ends of the string to selectively connect a channel of the string to a source line or bit line. Sense circuits are included on memory dies to sense current flowing through bit lines in order to determine the data values of the data that memory cells are storing or in order to verify that data has been correctly programmed into the memory cells. However, various challenges are present in operating such memory devices. For example, when a sense circuit desires to know the current flow through a bit line, a longer settling time of the bit line undermines the performance of the memory device.
It would be desirable to address at least this issue.